(version 1)
#PCBWay Custom DRC for Kicad 7

# ----------------------------------- Minimum trace width and spacing (PICK ONE) --------------------

# 2oz copper
#(rule "Minimum Trace Width and Spacing (outer layer)"
#(constraint track_width (min 0.1524mm))
#(constraint clearance (min 0.1778mm))
#(layer outer)
#(condition "A.Type == 'track'"))

#(rule "Minimum Trace Width and Spacing (innner layer)"
#(constraint track_width (min 0.1524mm))
#(constraint clearance (min 0.1778mm))
#(layer inner)
#(condition "A.Type == 'track'"))


# 2-layer, 1oz copper
(rule "Minimum Trace Width and Spacing (outer layer)"
(constraint track_width (min 0.127mm))
(constraint clearance (min 0.127mm))
(layer outer)
(condition "A.Type == 'track'"))

(rule "Minimum Trace Width and Spacing (inner layer)"
(constraint track_width (min 0.1mm))
(constraint clearance (min 0.1mm))
(layer inner)
(condition "A.Type == 'track'"))

# 4-layer , 1oz and 0.5oz copper
#(rule "Minimum Trace Width and Spacing (outer layer)"
#(constraint track_width (min 0.09mm))
#(constraint clearance (min 0.09mm))
#(layer outer)
#(condition "A.Type == 'track'"))

#(rule "Minimum Trace Width and Spacing (inner layer)"
#(constraint track_width (min 0.1mm))
#(constraint clearance (min 0.09mm))
#(layer inner)
#(condition "A.Type == 'track'"))

# ------------------------------------------------------------------------------------------------------

# Drill/hole size - listed here to maintain order of rule application. Must not override rule set in Via hole/diameter size below.
(rule "drill hole size (mechanical)"
(constraint hole_size (min 0.15mm) (max 6.3mm)))

# ----------------------------------- Via hole/diameter size (PICK ONE) ------------------------------------

# 2-layer standard
(rule "Minimum Via Diameter and Hole Size"
(constraint hole_size (min 0.3mm))
(constraint via_diameter (min 0.5mm))
(condition "A.Type == 'via'"))

# 4-layer standard
#(rule "Minimum Via Diameter and Hole Size"
#(constraint hole_size (min 0.3mm))
#(constraint via_diameter (min 0.45mm))
#(condition "A.Type == 'via'"))

# 4-layer advanced
#(rule "Minimum Via Diameter and Hole Size"
#(constraint hole_size (min 0.25mm))
#(constraint via_diameter (min 0.4mm))
#(constraint disallow buried_via)
#(condition "A.Type == 'via'"))

# 4-layer advanced
#(rule "Minimum Via Diameter and Hole Size"
#(constraint hole_size (min 0.2mm))
#(constraint via_diameter (min 0.35mm))
#(condition "A.Type == 'via'"))

# 4-layer advanced
#(rule "Minimum Via Diameter and Hole Size"
#(constraint hole_size (min 0.15mm))
#(constraint via_diameter (min 0.3mm))
#(condition "A.Type == 'via'"))

# ----------------------------------- Drill/hole size ------------------------------------

(rule "PTH Hole Size"
(constraint hole_size (min 0.2mm) (max 6.35mm))
(condition "A.Type != 'Via' && A.isPlated()"))

(rule "Minimum Non-plated Hole Size"
(constraint hole_size (min 0.5mm))
(condition "A.Type == 'pad' && !A.isPlated()"))

(rule "Pad Size"
(constraint hole_size (min 0.5mm))
(constraint annular_width (min 0.25mm))
(condition "A.Type == 'Pad' && A.isPlated()"))

(rule "Minimum Castellated Hole Size"
(constraint hole_size (min 0.6mm))
(condition "A.Type == 'pad' && A.Fabrication_Property == 'Castellated pad'"))

(rule "Min. Plated Slot Width"
(constraint hole_size (min 0.5mm))
(condition "(A.Hole_Size_X != A.Hole_Size_Y) && A.isPlated()"))

(rule "Min. Non-Plated Slot Width"
(constraint hole_size (min 0.8mm))
(condition "(A.Hole_Size_X != A.Hole_Size_Y) && !A.isPlated()"))

# ----------------------------------- Minimum clearance ----------------------------------
(rule "hole to hole clearance (different nets)"
(constraint hole_to_hole (min 0.5mm))
(condition "A.Net != B.Net"))

(rule "via to track clearance"
(constraint hole_clearance (min 0.254mm))
(condition "A.Type == 'via' && B.Type == 'track'"))

(rule "via to via clearance (same nets)"
(constraint hole_to_hole (min 0.254mm))
(condition "A.Type == 'via' && B.Type == A.Type && A.Net == B.Net"))

(rule "pad to pad clearance (with hole, different nets)"
(constraint hole_to_hole (min 0.5mm))
(condition "A.Type == 'pad' && B.Type == A.Type && A.Net != B.Net"))

(rule "pad to pad clearance (without hole, different nets)"
(constraint clearance (min 0.127mm))
(condition "A.Type == 'Pad' && B.Type == 'Pad'"))

(rule "NPTH to Track clearance"
(constraint hole_clearance (min 0.254mm))
(condition "A.Pad_Type == 'NPTH, mechanical' && B.Type == 'track'"))

(rule "NPTH with copper around"
(constraint hole_clearance (min 0.20mm))
(condition "A.Pad_Type == 'NPTH, mechanical' && B.Type != 'track'"))

(rule "PTH to Track clearance"
(constraint hole_clearance (min 0.33mm))
(condition "A.isPlated() && A.Type != 'Via' && B.Type == 'track'"))

(rule "Pad to Track clearance"
(constraint clearance (min 0.2mm))
(condition "A.isPlated() && A.Type != 'Via' && B.Type == 'track'"))

# ----------------------------------- Board Outlines (PICK ONE) -------------------------------------
#Default Routed Edge Clearance
(rule "Trace to Outline"
(constraint edge_clearance (min 0.3mm))
(condition "A.Type == 'track'"))

#Special Clearance for V-Score Edges
#(rule "Trace to V-Cut"
#(constraint edge_clearance (min 0.4mm))
#(condition "A.Type == 'track'"))

# ----------------------------------- silkscreen --------------------------
(rule "Minimum Text"
(constraint text_thickness (min 0.15mm))
(constraint text_height (min 0.8mm))
(layer "?.Silkscreen"))

(rule "Pad to Silkscreen"
(constraint silk_clearance (min 0.15mm))
(layer outer)
(condition "A.Type == 'pad' && (B.Type == 'text' || B.Type == 'graphic')"))
(version 1.1)
#----------------------------------------------------------------------------------------------------
# AISLER custom DRC rules.
# Make Hardware less Hard. 
#----------------------------------------------------------------------------------------------------
# We created these custom rules to warn you if your design hits our manufacturing bounderies. 
# You can disable the custom rules by commenting them out, though we advise against it.  
# These rules are valid as of May 2024, please check for updated ones on our forum.
# Please also note that these rules do not catch every single manufacturing limit. 
# If you are not certain please check the documentation on our website. 
#----------------------------------------------------------------------------------------------------

# As our tooling is finite we only support certain trough hole sizes. 
# Please keep the plated trough holes below 5.6mm in diameter. 
# We provide a community post for more details: 
# https://community.aisler.net/t/plated-and-non-plated-holes/50

(rule "Max Drill Hole Size PTH"
    (constraint hole_size (max 5.6mm))
    (condition "A.Pad_Type == 'Through-hole'"))

#----------------------------------------------------------------------------------------------------
# We dont support micro or buried vias

(rule "Disallow buried via"
   (constraint disallow buried_via))

(rule "Disallow micro via"
   (constraint disallow micro_via))

#----------------------------------------------------------------------------------------------------
# The Soldermask is pulled back by a bit to account for slight missalignment during manufacturing. 
# We do this on our own, please keep the soldermask margin set to 0. 

#(rule "Disallow solder mask margin overrides"
#    (constraint assertion "A.Soldermask_Margin_Override == null")
#    (condition "A.Type == 'Pad'"))

#----------------------------------------------------------------------------------------------------