208 lines
7.4 KiB
Plaintext
208 lines
7.4 KiB
Plaintext
(version 1)
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#PCBWay Custom DRC for Kicad 7
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# ----------------------------------- Minimum trace width and spacing (PICK ONE) --------------------
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# 2oz copper
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#(rule "Minimum Trace Width and Spacing (outer layer)"
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#(constraint track_width (min 0.1524mm))
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#(constraint clearance (min 0.1778mm))
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#(layer outer)
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#(condition "A.Type == 'track'"))
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#(rule "Minimum Trace Width and Spacing (innner layer)"
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#(constraint track_width (min 0.1524mm))
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#(constraint clearance (min 0.1778mm))
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#(layer inner)
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#(condition "A.Type == 'track'"))
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# 2-layer, 1oz copper
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(rule "Minimum Trace Width and Spacing (outer layer)"
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(constraint track_width (min 0.127mm))
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(constraint clearance (min 0.127mm))
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(layer outer)
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(condition "A.Type == 'track'"))
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(rule "Minimum Trace Width and Spacing (inner layer)"
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(constraint track_width (min 0.1mm))
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(constraint clearance (min 0.1mm))
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(layer inner)
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(condition "A.Type == 'track'"))
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# 4-layer , 1oz and 0.5oz copper
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#(rule "Minimum Trace Width and Spacing (outer layer)"
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#(constraint track_width (min 0.09mm))
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#(constraint clearance (min 0.09mm))
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#(layer outer)
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#(condition "A.Type == 'track'"))
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#(rule "Minimum Trace Width and Spacing (inner layer)"
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#(constraint track_width (min 0.1mm))
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#(constraint clearance (min 0.09mm))
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#(layer inner)
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#(condition "A.Type == 'track'"))
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# ------------------------------------------------------------------------------------------------------
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# Drill/hole size - listed here to maintain order of rule application. Must not override rule set in Via hole/diameter size below.
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(rule "drill hole size (mechanical)"
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(constraint hole_size (min 0.15mm) (max 6.3mm)))
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# ----------------------------------- Via hole/diameter size (PICK ONE) ------------------------------------
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# 2-layer standard
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(rule "Minimum Via Diameter and Hole Size"
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(constraint hole_size (min 0.3mm))
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(constraint via_diameter (min 0.5mm))
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(condition "A.Type == 'via'"))
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# 4-layer standard
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#(rule "Minimum Via Diameter and Hole Size"
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#(constraint hole_size (min 0.3mm))
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#(constraint via_diameter (min 0.45mm))
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#(condition "A.Type == 'via'"))
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# 4-layer advanced
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#(rule "Minimum Via Diameter and Hole Size"
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#(constraint hole_size (min 0.25mm))
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#(constraint via_diameter (min 0.4mm))
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#(constraint disallow buried_via)
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#(condition "A.Type == 'via'"))
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# 4-layer advanced
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#(rule "Minimum Via Diameter and Hole Size"
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#(constraint hole_size (min 0.2mm))
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#(constraint via_diameter (min 0.35mm))
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#(condition "A.Type == 'via'"))
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# 4-layer advanced
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#(rule "Minimum Via Diameter and Hole Size"
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#(constraint hole_size (min 0.15mm))
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#(constraint via_diameter (min 0.3mm))
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#(condition "A.Type == 'via'"))
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# ----------------------------------- Drill/hole size ------------------------------------
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(rule "PTH Hole Size"
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(constraint hole_size (min 0.2mm) (max 6.35mm))
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(condition "A.Type != 'Via' && A.isPlated()"))
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(rule "Minimum Non-plated Hole Size"
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(constraint hole_size (min 0.5mm))
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(condition "A.Type == 'pad' && !A.isPlated()"))
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(rule "Pad Size"
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(constraint hole_size (min 0.5mm))
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(constraint annular_width (min 0.25mm))
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(condition "A.Type == 'Pad' && A.isPlated()"))
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(rule "Minimum Castellated Hole Size"
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(constraint hole_size (min 0.6mm))
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(condition "A.Type == 'pad' && A.Fabrication_Property == 'Castellated pad'"))
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(rule "Min. Plated Slot Width"
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(constraint hole_size (min 0.5mm))
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(condition "(A.Hole_Size_X != A.Hole_Size_Y) && A.isPlated()"))
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(rule "Min. Non-Plated Slot Width"
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(constraint hole_size (min 0.8mm))
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(condition "(A.Hole_Size_X != A.Hole_Size_Y) && !A.isPlated()"))
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# ----------------------------------- Minimum clearance ----------------------------------
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(rule "hole to hole clearance (different nets)"
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(constraint hole_to_hole (min 0.5mm))
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(condition "A.Net != B.Net"))
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(rule "via to track clearance"
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(constraint hole_clearance (min 0.254mm))
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(condition "A.Type == 'via' && B.Type == 'track'"))
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(rule "via to via clearance (same nets)"
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(constraint hole_to_hole (min 0.254mm))
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(condition "A.Type == 'via' && B.Type == A.Type && A.Net == B.Net"))
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(rule "pad to pad clearance (with hole, different nets)"
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(constraint hole_to_hole (min 0.5mm))
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(condition "A.Type == 'pad' && B.Type == A.Type && A.Net != B.Net"))
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(rule "pad to pad clearance (without hole, different nets)"
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(constraint clearance (min 0.127mm))
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(condition "A.Type == 'Pad' && B.Type == 'Pad'"))
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(rule "NPTH to Track clearance"
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(constraint hole_clearance (min 0.254mm))
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(condition "A.Pad_Type == 'NPTH, mechanical' && B.Type == 'track'"))
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(rule "NPTH with copper around"
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(constraint hole_clearance (min 0.20mm))
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(condition "A.Pad_Type == 'NPTH, mechanical' && B.Type != 'track'"))
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(rule "PTH to Track clearance"
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(constraint hole_clearance (min 0.33mm))
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(condition "A.isPlated() && A.Type != 'Via' && B.Type == 'track'"))
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(rule "Pad to Track clearance"
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(constraint clearance (min 0.2mm))
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(condition "A.isPlated() && A.Type != 'Via' && B.Type == 'track'"))
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# ----------------------------------- Board Outlines (PICK ONE) -------------------------------------
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#Default Routed Edge Clearance
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(rule "Trace to Outline"
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(constraint edge_clearance (min 0.3mm))
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(condition "A.Type == 'track'"))
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#Special Clearance for V-Score Edges
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#(rule "Trace to V-Cut"
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#(constraint edge_clearance (min 0.4mm))
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#(condition "A.Type == 'track'"))
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# ----------------------------------- silkscreen --------------------------
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(rule "Minimum Text"
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(constraint text_thickness (min 0.15mm))
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(constraint text_height (min 0.8mm))
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(layer "?.Silkscreen"))
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(rule "Pad to Silkscreen"
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(constraint silk_clearance (min 0.15mm))
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(layer outer)
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(condition "A.Type == 'pad' && (B.Type == 'text' || B.Type == 'graphic')"))
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(version 1.1)
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#----------------------------------------------------------------------------------------------------
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# AISLER custom DRC rules.
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# Make Hardware less Hard.
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#----------------------------------------------------------------------------------------------------
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# We created these custom rules to warn you if your design hits our manufacturing bounderies.
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# You can disable the custom rules by commenting them out, though we advise against it.
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# These rules are valid as of May 2024, please check for updated ones on our forum.
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# Please also note that these rules do not catch every single manufacturing limit.
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# If you are not certain please check the documentation on our website.
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#----------------------------------------------------------------------------------------------------
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# As our tooling is finite we only support certain trough hole sizes.
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# Please keep the plated trough holes below 5.6mm in diameter.
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# We provide a community post for more details:
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# https://community.aisler.net/t/plated-and-non-plated-holes/50
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(rule "Max Drill Hole Size PTH"
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(constraint hole_size (max 5.6mm))
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(condition "A.Pad_Type == 'Through-hole'"))
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#----------------------------------------------------------------------------------------------------
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# We dont support micro or buried vias
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(rule "Disallow buried via"
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(constraint disallow buried_via))
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(rule "Disallow micro via"
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(constraint disallow micro_via))
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#----------------------------------------------------------------------------------------------------
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# The Soldermask is pulled back by a bit to account for slight missalignment during manufacturing.
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# We do this on our own, please keep the soldermask margin set to 0.
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(rule "Disallow solder mask margin overrides"
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(constraint assertion "A.Soldermask_Margin_Override == 0mm")
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(condition "A.Type == 'Pad'"))
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#---------------------------------------------------------------------------------------------------- |